FPGA Design Engineer - Contractor
We are looking for an enthusiastic and highly motivated FPGA Design Engineer to join our engineering team working on advanced electronics systems for motorsport.
Job Description:
We are looking for a hands‑on FPGA Design Engineer to develop high‑reliability digital logic for motorsport engine controllers (ECUs) and power management units (PMUs).
You’ll own RTL design on Intel (Altera) Cyclone V FPGA/SoC platforms, integrate with high‑speed I/O, and implement robust inter‑FPGA communications across complex boards.
The Role:
FPGA architecture & RTL design: Specify, implement, and maintain VHDL for control, signal processing, timing, and safety features on Cyclone V devices (including SoC variants with HPS integration).
SoC/HPS integration: Integrate V SoC (ARM CortexA9 HPS) via Avalon/AXI bridges; define memorymapped peripherals, DMA paths, and shared memory for realtime data exchange.
InterFPGA communications: Design and validate reliable links (e.g., LVDS, custom serial, Auroralike soft links), including CDC management, link bringup, and error detection/correction.
ECU/PMU features: Implement crank/cam wheel decoding, toothgap detection, phase tracking, and timestamping. PWM/injection/ignition timing blocks with microsecondlevel determinism. Sensor acquisition pipelines (SPI/I²C/UART/ADC interfaces), digital filtering (fixedpoint), diagnostics, and failsafe state machines. PMU switching control, current/voltage monitoring. CAN 2.0B transmit and receive.
Verification: Build unit and system testbenches.
Board bringup: Support lab validation with oscilloscopes, logic analysers, JTAG, boundary scan; rootcause issues across FPGA ↔ MCU/HPS ↔ sensors/actuators.
Documentation & release discipline: Produce clear specs, design notes, release artifacts; adhere to version control (Git) workflows.
Crossfunctional delivery: Partner with hardware and embedded software teams to hit milestones under tight timelines.
Consider the health and safety, environmental and energy impact of all activities.
Support the Company’s compliance with the UK General Data Protection Regulation (UK GDPR) and the Data Protection Act 2018 by following company policy and best practice.
Candidate Profile:
Demonstrable FPGA development with Intel (Altera) Cyclone V (including SoC/HPS).
Strong RTL skills (VHDL/Verilog/SystemVerilog) and Quartus Prime, TimeQuest
Proven interFPGA communication design (LVDS/serial links/highspeed SPI) and CDC best practices.
Experience integrating fabric with processors via Avalon/AXI, memorymapped interfaces, DDR3/SRAM controllers.
Solid verification skills and handson lab bringup experience.
Version control (Git) is essential: branching, code reviews, tags/releases, submodules/IP management.
Ability to read schematics, collaborate with hardware teams, and work to tight motorsport timelines.
- Department
- Hardware Engineering
- Role
- FPGA Design Engineer
- Locations
- Cottenham
- Contract type
- Fixed Term
- Remote status
- Hybrid remote
Cottenham
Our Benefits
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25 days holiday, plus bank holidays.
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Workplace pension, matched up to 6%.
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Onsite occupational health.
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Digital GP service
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Private Medical Insurance.
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Employee assistance programme.
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Income protection.
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Life assurance.
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Cycle to work scheme.
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Hybrid working (dependent on role).
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Discounted shopping.
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